| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide an input circuit for a semiconductor memory provided with a input circuit having a clock selecting section. SOLUTION: A clock selection circuit 210 receives an internal clock signal before a data strobe signal is enabled. An input circuit 200 is provided with a plurality of input buffers 203, 205, 207, the clock selection circuit 210, a calibration circuit 209, and a plurality of data registers 221, 223, 225. The clock selection circuit holds the prescribed first logic level for a fixed time from a time at which a supply power source is supplied first and, after that, receives a selection signal CL1 being a second logic level. When the selection signal CL1 is a first logic level, the clock selection circuit 210 selects the clock signal CLK and outputs it as a first clock signal SCLK, when the selection signal CL1 is a second logic level, the circuit 210 selects a data strobe signal DQS and outputs it as a second clock signal SCLK.</p> |
