发明名称 |
TRANSMITTING DEVICE, RECEIVER AND SIGNAL STRUCTURE |
摘要 |
PROBLEM TO BE SOLVED: To provide a transmitting device and a receiving device which enable to identify a mark for performing reverse-SCL on the basis of the result of demodulating TMCC without researching for the marks of identified bits such as B8h. SOLUTION: A means for producing a TMCC by the device is that a standard timing for starting scramble processing of input data is virtually synchronized with the timing for modulation processing in which main data Dt is produced after scrambled data is modulated, and the timing for modulation processing is virtually synchronized with the timing for producing TMCC.
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申请公布号 |
JP2003037576(A) |
申请公布日期 |
2003.02.07 |
申请号 |
JP20010222841 |
申请日期 |
2001.07.24 |
申请人 |
HITACHI KOKUSAI ELECTRIC INC;NIPPON HOSO KYOKAI <NHK> |
发明人 |
MIYASHITA ATSUSHI;IKEDA TETSUOMI |
分类号 |
H04L27/00;H04J11/00;H04L25/03;H04L27/26;(IPC1-7):H04J11/00 |
主分类号 |
H04L27/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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