LOGICAL SIMULATION DEVICE AND ITS METHOD

摘要

PROBLEM TO BE SOLVED: To provide a highly-precise logical simulation device and to reduce a verification period in logical simulation by taking into consideration the simulation execution sequence of sequence circuits whose output signal is a clock signal. SOLUTION: The logical simulation device according to this invention comprises a selection means 2 for selecting from sequence circuits only those sequence circuits whose output is a clock signal, a preceding means 3 for preprocessing logical simulation of the sequence circuits selected by the selection means 2, and a continuation means 4 for executing the logical simulation of other sequence circuit configurations.