| 摘要 |
PURPOSE: To improve software error resistance, without having to increase the number of manufacturing processes. CONSTITUTION: This circuit has an inverter circuit INV1, of which an input terminal is connected to a storage node (a), and an output terminal is connected to a storage node (b), an inverter circuit INV2 of which an input terminal is connected to a storage node (b) and an output terminal is connected to a storage node (a), a nMOS transistor NM1 of which a gate terminal is connected to the storage node (a), a pMOS transistor PM1 of which a gate terminal is connected to the storage node (b), and a nMOS transistor NR1 connecting each drain of the nMOS transistor NM1 and the pMOS transistor PM1 to a read bit line RBL1.
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