发明名称 TESTING APPARATUS AND METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a testing apparatus and a testing method for achieving a bypass function that is not affected by the state of IR in a JTAG circuit. SOLUTION: A JTAG circuit of the following description is provided for each logic, where the JTAG circuit comprises a BSR 11 for storing a test result after testing a logic according to test data input, a DR 12, a TR 16 having a bypass function of test data input, a first selector 17 that is connected to the DR 12 and TR 16 for selectively taking out the output of each register, a BR 13 having a bypass function of test data input, an IR 14 for giving a control instruction, and a second selector 18 that is connected to the BSR 11 and the first selector 17, and the BR 13 and IR 14 is selectively controlled by the IR 14. Then, the output of the second selector 18 of a specific logic is inputted to another logic input.
申请公布号 JP2003035751(A) 申请公布日期 2003.02.07
申请号 JP20010224899 申请日期 2001.07.25
申请人 MITSUBISHI ELECTRIC CORP;RYODEN SEMICONDUCTOR SYST ENG CORP 发明人 MATSUO YUKIKAZU;NAGURA YOSHIHIRO
分类号 G01R31/28;G01R31/3185;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 主分类号 G01R31/28
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