CLOCK INDUCED SUPPLY NOISE REDUCTION METHOD FOR A LATCH BASED CIRCUIT

摘要

A method for reducing the noise associated with a clock signal for a latch based circuit has been developed. The method includes storing a charge at a pre-determined time of the clock cycle and releasing the stored charge also at a pre-determined time of the clock cycle. The charge is released onto the power grid of the system served by the clock signal in synchronization with the operation of the latch.