| 摘要 |
PURPOSE: A clock synchronizing apparatus in a high conversion of a private exchange is provided to prevent a glitch and a bit loss by restraining a noise occurring in a high conversion, synchronizing a clock by synchronizing a subclock to a main clock and adjusting a line impedance of a highway so as to cope with a noise or a power variation. CONSTITUTION: A line impedance determining unit(200) adjusts a line impedance of a 2Mbps highway to cope with a noise and a power variation and applies the adjusted line impedance to a highway converting unit(100). A glitch removing and synchronizing unit(300) synchronizes an external input clock(subclock) to a CPU clock(main clock) and inputs the subclock filtered on condition that it has the N number of delay time as a source to the highway converting unit(100).
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