发明名称
摘要 PURPOSE: A method for fabricating a shallow junction by a selective epitaxial growth(SEG) method is provided to eliminate the necessity for a heat treatment process for activating impurities, by forming a junction of a precise depth on a substrate, by preventing the loss of a source/drain in etching a contact while obtaining a uniform doping density in the junction and by making the impurities grown as a single crystal. CONSTITUTION: A metal interconnection(110) is formed on a semiconductor substrate(100). The first photoresist layer for forming an interlayer dielectric and a source/drain(150) of a p+ region is applied. An etch process for patterning the first photoresist layer is performed to form a source/drain formation portion of a p+ region by using the first photoresist layer as a mask. The first photoresist layer is removed. Silicon grows by an SEG method to form the source/drain of the p+ region. A passivation layer is deposited on the resultant structure. The second photoresist layer for forming a source/drain of an n+ region(190) is applied on the passivation layer. An etch process for patterning the second photoresist layer is performed to form a source/drain formation portion of the n+ region. The second photoresist layer is eliminated. Silicon is grown by an SEG method to form the source/drain of the n+ region. The passivation layer is removed.
申请公布号 KR100371146(B1) 申请公布日期 2003.02.06
申请号 KR20010006246 申请日期 2001.02.08
申请人 发明人
分类号 H01L21/20 主分类号 H01L21/20
代理机构 代理人
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