| 摘要 |
PURPOSE: A data input/output device of an embedded memory device is provided, which reduces a design time using a memory compiler by realizing a narrow and a wide data width at the same time on one device during a memory design of a MML(Merged Memory and Logic). CONSTITUTION: A memory cell block includes a plurality of sub cell regions(31). A row decoder(32) and a column decoder(33) is constituted on a position orthogonal to the sub cell regions corresponding to the sub cell regions. A switching part outputs a narrow column control signal(yi_narrow1) for narrow I/O or a wide column control signal(yi_narrow2) for wide I/O by switching a decoded address being output from the column decoder selectively. And a column address selection part(34) outputs a wide column address signal(yi_wide<0:m>) by the control of a selection control signal(nCm) by receiving the wide column control signal by being located between the column decoder and the sub cell region.
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