| 摘要 |
When channel allocation is scheduled in a dynamic TDMA frame for communications with a plurality of terminals and then the scheduling results are reflected in a frame table, a shift register is used as the frame table. The shift register comprises a plurality of register units coupled in tandem. Each of the register units is allocable to a channel for one of the plurality of terminals. A shift controller is coupled to the shift register, and controls the shift register such as to write a new channel defining data at a given register unit and collectively shift a plurality of channel defining data respectively stored in a plurality of register units so as to make space for said new channel defining data at said given shift register.
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