| 摘要 |
<p>A memory card (1) includes data terminals (DATA/SDI0, DATA1, DATA2, DATA3) for performing bidirectional communication of 4-bit parallel data with a host by using four data communication lines, a clock terminal (SCLK) for receiving a clock from the host, and a terminal (BS) for receiving from the host a bus state signal indicating the state of the communication lines of the 4-bit parallel data and the transmission start timing. The first data terminal (DATA0/SDI0) is also used as a data terminal of a memory card performing 1-bit serial data communication and is compatible with this memory card.</p> |
