| 摘要 |
PURPOSE: A D flip-flop circuit is provided to reduce unnecessary charge/discharge according to a clock signal without changing of a stored value in the flip-flop, by allowing the clock signal to enter the flip-flop when a value to be newly stored is different from a previously stored value. CONSTITUTION: The first transfer units(31) transfers a data signal from the external to the first output terminal(Q') in response to signals of the first and second nodes(P1,P3). The first inverter(I3) inverts an output signal of the first output terminal(Q') and outputs the inverted signal to the second output terminal. The second transfer units(32) transfers an output signal of the first transfer units to the second output terminal in response to the signals of the first and second node(P1,P3). A comparison units(34) compares an output signal of the second output terminal with the data signal and transfers the clock signal(CLK) to the first node when the data signal is different from the output signal of the second output terminal. The second inverter(I1) inverts a signal of the first node and outputs the inverted signal to the second node.
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