METHOD FOR PLANARIZING NON-VOLATILE MEMORY

摘要

PURPOSE: A method for planarizing a non-volatile memory is provided to remove a stepper portion between a cell region of a flash memory device and a peripheral region of a logic device in a process for forming a word line. CONSTITUTION: A floating gate structure is formed on a cell region of a semiconductor substrate(100). A conductive layer(113) is formed on the floating gate structure and the semiconductor substrate(100). A hard mask layer is formed on the conductive layer(113). The first insulating layer is formed on the hard mask layer. The first insulating layer is removed from the cell region. The first insulating layer pattern is formed on a peripheral region. The hard mask layer is removed from the cell region. The second insulating layer(125) is formed on the first insulating layer pattern. The cell region and the peripheral region are planarized by removing the second insulating layer(125) and the first insulating layer pattern. A word line is formed on both sidewalls of the floating gate structure by patterning the conductive layer(113). A gate of a logic device is formed on the peripheral region.