Method of fabrication of multilayer semiconductor wiring structure with reduced alignment mark area

摘要

When the through holes are formed in the first to the eighth insulation layers, an alignment is performed by using an alignment mark provided in the lowermost wiring layer. The alignment marks provided in the insulation layers are formed by being alternately overlapped in two areas of a scribe line having a saucer, thereby, the area occupied by the alignment marks is reduced.