| 摘要 |
Method for controlling FIFO multi-port RAM (106) in an interface-switching device (90). Write access is controlled by a write pointer. Each datum can be read by at multiple destinators, with a read pointer (PtRi) associated with each one. There is a read request by a destinator, the reading of a datum indicated by the read pointer associated with the destinator after receiving the request, and the read pointer is updated. The FIFO memory store is implemented as a Multi-Port RAM (MPR AM, 106) which allows a simultaneous reading of distinct data by at least two destinators. The method comprises a step for a dynamic modification of the size of FIFO, which is effected by a withdrawal or an addition of a block of a memory zone. The method comprises a step for attaching a communication channel to each destinator. The method applications are in the domain of video, audio, bus IEEE 1394, network of type IEEE 1355, and the interfacing between at least one network of type IEEE 1355 (104) and at least one bus IEEE 1394 (103). The device for controlling a memory of type FIFO implements the method and comprises means for implementing each step. A computer program comprises instructions for executing the steps of the method when the program is executed on a computer. A computer program product comprises the program recorded on a support usable in a computer and programming means readable by the computer for associating the read pointer of FIFO with each destinator.
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