发明名称 FERROELECTRIC MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To enable correction using an error correction circuit, by making prevention of only single memory cell information being in error, without making a plurality of memory cell information an error simultaneously, when one word line is defective, in a ferroelectric memory device form which data of a plurality of memory cells are outputted in parallel. SOLUTION: At read-out operation, read-out/write-in of the data of one memory cell are conducted for one word line, and read-out/write-in of data of a plurality of memory cells indicated in a region 12 are performed, by selecting a plurality of word lines. Thereby, only single memory cell information result will result in error, without making a plurality of memory cell information an error simultaneously, even if one word line is defective, and correction can be made using the error correction circuit 10.
申请公布号 JP2003030979(A) 申请公布日期 2003.01.31
申请号 JP20010215243 申请日期 2001.07.16
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KAWANAMI YASUSHI
分类号 G11C11/22;G11C29/00;G11C29/42;(IPC1-7):G11C11/22 主分类号 G11C11/22
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