| 摘要 |
PROBLEM TO BE SOLVED: To provide a memory controller capable of widening band width for accessing a DRAM from individual initiators to a DRAM. SOLUTION: A command processor 5 is provided with: an address map generator 11 to extract the address information of volatile storage devices from the data headers of the respective memory access requests and to generate and address map in which the access band width of a DRAM 1 from the respective addresses to be outputted from the command processor 5 is optimized; and an address converter 10 to convert the address information in the memory access request to be arbitrated and outputted from the command processor 5 by using the address map.
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