| 摘要 |
PROBLEM TO BE SOLVED: To provide a power-on reset circuit that can prevent malfunction due to voltage fluctuations at circuit reset at application of power and at power switching and can avoid malfunction when the rising of a power supply voltage is slow at re-application of power and to provide an electronic device. SOLUTION: The power-on reset circuit comprises an operating voltage control means 11, a 1st PMOS transistor (TR) P2, a 2nd PMOS TR P3, a 1st capacitor C1, an inverter means comprising 1st to 3rd inverter circuits INV1 to INV3 where an input of the 1st inverter circuit INV1 is connected to one terminal of the 1st capacitor and an output of the 3rd inverter circuit is connected to a gate of the 2nd PMOS TR, and a 2nd capacitor C2 connected between the input of the 1st inverter circuit and an input of the 3rd inverter circuit, and a power-on reset signal is outputted from an output of the 3rd inverter.
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