发明名称 DIGITALLY MATCHED FILTER
摘要 PROBLEM TO BE SOLVED: To provide a digitally matched filter applicable to a small-sized receiver by suppressing the circuit scale for multipliers and adders or the like having been increased in proportion to a spread rate in a conventional technology. SOLUTION: This invention provides the digital matched filter where a reception base band signal selection section 2c sequentially selects an I phase signal and a Q phase signal of a received base band and a reference code I phase multiplier 3a, a reference code Q phase multiplier 3b, an I phase adder section 6a, and a Q phase adder section 6b implement a product-sum operation at a higher rate than a sampling rate of the received base band signal.
申请公布号 JP2003032143(A) 申请公布日期 2003.01.31
申请号 JP20010211742 申请日期 2001.07.12
申请人 HITACHI KOKUSAI ELECTRIC INC 发明人 WATANABE ATSUSHI
分类号 H04B1/707;H04B1/7093 主分类号 H04B1/707
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