发明名称 DEBUG SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a debug system capable of enhancing efficiency of debug. SOLUTION: A CPU 22, a DSU 23 to support the debug of a program which is made to be executed by the CPU 22 and an exclusive memory 24 connected with the DSU 23 are mounted on an evaluation chip 21. The DSU 23 is provided with a control register 23a in which control information is set and maps the exclusive memory 24 in an emulator space based on the control information set in the control register 23a.
申请公布号 JP2003030003(A) 申请公布日期 2003.01.31
申请号 JP20010218316 申请日期 2001.07.18
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 WATARAI YUJI;TAGAWA KOTARO
分类号 G06F11/28;G06F11/22;G06F15/78 主分类号 G06F11/28
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