发明名称 STORAGE DEVICE
摘要 <p>A command analysis/control unit (24) transfers the data of a memory cell array (21) to a second data register (25) when it receives a data transfer command through an input/output buffer (23). An address translation unit (26) translates the logic address, as inputted from a CPU (1), into a physical address of the second data register (25) and outputs it to the second data register (25), so that the CPU (1) can make a random access to the second data register (25). As a result, the CPU (1) can make a random access to the memory cell array (21) thereby to improve the processing speed of a device such as a mobile telephone carrying a storage device.</p>
申请公布号 WO2003009301(P1) 申请公布日期 2003.01.30
申请号 JP2001006191 申请日期 2001.07.17
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