Variable width parallel cyclical redundancy check

摘要

Apparatus and method for generating and checking a cyclical redundancy check value wherein a first device calculates a cyclical redundancy check value on a full set of bits of input data to produce a first value and a second device calculates a cyclical redundancy check value on a subset of the full set of bits of input data to produce a second value. One of the values is selected for transmission to a register. The value in the register is fed back to the devices for iterating the cyclical redundancy check value calculation until it has been completed. For checking a cyclical redundancy check value, a comparator compares a calculated, cyclical redundancy check value with the received cyclical redundancy check value or with a constant