A method and apparatus for simulating a source system having a plurality of source clocks to trigger a plurality of logic elements is provided. The plurality of source clocks are modeled with a global clock. At least one of the plurality of source clocks is modeled with a clock mask and a clock state. At least one of the plurality of logic elements is evaluated when the global clock generates a global clock pulse and updated based on the clock mask and the clock state.
申请公布号
WO03009184(A2)
申请公布日期
2003.01.30
申请号
WO2002US22586
申请日期
2002.07.16
申请人
SUN MICROSYSTEMS, INC.
发明人
CHEN, LIANG, T.;COHEN, EARL, T.;KAO, RUSSELL;MCWILLIAMS, THOMAS, M.