发明名称 TESTING MODE CONTROL CIRCUIT OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a testing mode control circuit of a semiconductor device that can execute plural kinds of test mode in an arbitrary order. SOLUTION: This control circuit is provided with a shift register, consisting of serially connected resisters of n×m pieces, an input terminal for inputting a data to a register at one end of the registers of n×m pieces, clock signal lines connected to all registers, and an output terminal for outputting a data from a register, at the other end of the registers of n×m pieces. One testing mode is specified by n data held in the n registers. The clock signal line is used to supply a clock signal for moving the data held in the register to the adjoining next register.
申请公布号 JP2003028933(A) 申请公布日期 2003.01.29
申请号 JP20010217231 申请日期 2001.07.17
申请人 TOSHIBA CORP 发明人 TAKEYAMA YASUHISA;OTSUKA NOBUAKI
分类号 G01R31/28;G01R31/3185;G06F11/22;H01L21/822;H01L27/04 主分类号 G01R31/28
代理机构 代理人
主权项
地址