发明名称 |
NON-VOLATILE SEMICONDUCTOR MEMORY |
摘要 |
PURPOSE: To solve such a problem that read and write cycles of a memory cell takes double time when a memory cell in which two bits/cell is stored is used and to provide a peripheral control circuit having memory array constitution in which area can be reduced. CONSTITUTION: Each memory is connected through a common bit line in which two cells are a drain or a source, and a memory array is constituted by arranging a plurality of unit memory arrays of this two cells. And write or read can be performed by simultaneous one time access for a plurality of bites by replacing bit arrangement of a memory cell array by a write method or a read method. Also, operation speed is increased by providing a sensor amplifier which is not pre-charged as further increasing read speed.
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申请公布号 |
KR20030009060(A) |
申请公布日期 |
2003.01.29 |
申请号 |
KR20020002977 |
申请日期 |
2002.01.18 |
申请人 |
HITACHI ULSI SYSTEMS CO., LTD.;HITACHI, CO., LTD. |
发明人 |
KANAI TAKEO;KATAYAMA KOZO;MINAMI SHINICHI;YAMAZOE TAKANORI;YOSHIAKI KAMIGAKI;YOSHIGI HIROSHI |
分类号 |
G11C16/02;G06K19/07;G11C11/56;G11C16/04;G11C16/06;G11C16/10;G11C16/26;(IPC1-7):G11C16/06 |
主分类号 |
G11C16/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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