| 摘要 |
<p>A signal processing apparatus using a plurality of microcomputers and a shared ROM. A microcomputer-A (10) is connected to a microcomputer-B (11) by way of a serial interface (60) and a GPIO signal line (70). A flash ROM (13) incorporated in the microcomputer-A (10) has a program memory map (400) corresponding to the microcomputer-A (10), wherein a run start address (405) of the microcomputer-B (11), a program data size (406) and program data (407) therefor are disposed in a parameter table area (403) of the program memory map (400) corresponding to the microcomputer-A (10). Upon power-up, the microcomputer-A (10) transfers data to the microcomputer-B (11) via the serial interface (60), whereupon the microcomputer-B (11) executes signal processing in the ordinary operation mode. <IMAGE></p> |
