发明名称 Circuit configuration for monitoring an output load
摘要 The circuit has a first digital comparator (12) which compares the data words fed to the converter (1) with at least one comparison data word. A second, analogue comparator (5) compares the voltage drop across a resistor (2) in parallel with the output load (4) with at least one reference voltage and drives a flip-flop circuit (8). A comparison circuit (11) controls the size and/or existence of the output load depending on the output signals of the first comparator and the flip-flop. AN Independent claim is also included for applications of the circuit for computer graphics, current digital-analogue converter current balancing and monitoring the bandwidth of the output signal of a current digital-analogue converter.
申请公布号 EP0942537(A3) 申请公布日期 2003.01.29
申请号 EP19990200617 申请日期 1999.03.03
申请人 PHILIPS CORPORATE INTELLECTUAL PROPERTY GMBH;KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 MEYER, ROBERT;PFARRKIRCHER, OTHMAR
分类号 H03M1/10 主分类号 H03M1/10
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