发明名称 |
Method for preventing the leakage path in embedded non-volatile memory |
摘要 |
A method for forming an embedded non-volatile memory is disclosed. The embedded non-volatile memory, comprises memory array and logic device area, is formed on a substrate where an oxide/nitride/oxide (ONO) layer on a memory array, a gate oxide layer on a logic device area. The method is that transistors of memory array and transistors of logic device area are formed by two separately photolithography processes. In memory array, the pitch between the poly gate electrodes is equivalent and has wider spacer width. In logic device area, the pitch between the poly gate electrodes is different and has suitable spacer width. According to above-mentioned, by using separated spacer width in memory array and logic device area can avoid the leakage path between bit line to bit line in subsequently self-aligned salicide process.
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申请公布号 |
US6511882(B1) |
申请公布日期 |
2003.01.28 |
申请号 |
US20010990287 |
申请日期 |
2001.11.23 |
申请人 |
MACRONIX INTERNATIONAL CO., LTD. |
发明人 |
KUO TUNG-CHENG;HWANG SHOU-WEI;LIU CHIEN-HUNG;PAN SHYI-SHUH |
分类号 |
H01L21/8246;H01L21/8247;H01L27/105;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/8246 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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