| 摘要 |
A variable frequency oscillator provides an output frequency that is adjustable by selectively combining different delay signals from separate signal paths. The present invention's oscillator includes first and second differential signal paths, each exhibiting a different time delay or "phase." Each signal path includes a series coupling of multiple delay elements, where each delay element comprises a single differential amplifier transistor pair. Each signal path's delay is established by setting the biasing and geometry of the signal paths' differential amplifier transistor pairs. A combiner, separately coupled to each signal path, selectively combines signals from the paths to provide a representative output. This output is also fed back as input to both signal paths. As an example, the combiner may be provided by two non-nested differential amplifier transistor pairs. The ratio at which the combiner combines signals from the signal paths may be changed by adjusting the biasing of the combiner's differential amplifier transistors pairs. A buffer may be coupled to the oscillator for the purpose of isolating amplifying, sampling, storing, or favorably loading the oscillator's output. In one embodiment, the buffer is coupled to the output of one of the signal paths. In another embodiment, the buffer is coupled to the output of the combiner.
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