| 摘要 |
PROBLEM TO BE SOLVED: To prevent an increase in signal propagation delay due to the influence of crosstalks without increasing the area of a wiring region in a semiconductor circuit. SOLUTION: In a drive circuit 120 for driving an output signal line 150, a first potential combination on a high potential side which is the combination of a first high potential (Vdd) and a first low potential (Vdd/2+a) and a second potential combination on a low potential side which is the combination of a second high potential (Vdd/2-a) and a second low potential (0 v) are forcibly switched at every potential change of clock signals by an output potential switching circuit 160. The first low potential (Vdd/2+2) is set to a potential which is equal to or higher than the second high potential (Vdd/2-a). Thus, since the potential change of two adjacent signal lines are prevented from being related in opposite phases, an increase in signal propagation delay due to the influence of the crosstalks is prevented without increasing wiring or increasing the area of the wiring region.
|
