| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which can surely hold RAM data by preventing RAM data from being destructed due to an asynchronous reset. SOLUTION: When a reset signal is made active by an AND 10 circuit, a NAND circuit 12, and a delay block 11, first, a word line of the RAM is made non-selection, after that, a system is reset. Thereby, the RAM data is prevented from being destructed when a reset signal is made active at the time of access for the RAM. Also, a low voltage detecting circuit 2 detects whether or not a power potential is made slightly higher low voltage detecting potential than RAM holding voltage or less, when the power potential does not become a low voltage detecting potential or less, the power potential is held at a RAM holding voltage or more, thereby surely holding data of the RAM.
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