发明名称 BI-DIRECTIONAL RAM
摘要 <p>PROBLEM TO BE SOLVED: To provide a bi-directional RAM in simple configuration capable of executing data input and data output by two clock frequencies which does not have any multiple relation. SOLUTION: This bi-directional RAM is provided with a first data register 2 and a second data register 6, a first flag register 3 and a second flag register 7, and a first controller 1 and a second controller 5 connected between a first controller for performing data transfer by a first clock frequency and a second controller for performing data transfer by a second clock frequency which does not have any multiple relation with the first clock frequency. The first controller 1 executes the data input of the first data register 2 and the data output of the second data register 6 by the first clock frequency, and sets a flag in the first flag register 3 at the time of executing the data input to the first data register 2. The second controller 5 executes the data input of the second data register 6 and the data output of the first register 2 by the second clock frequency and sets a flag in the second flag register 7 at the time of executing the data input to the second data register 6.</p>
申请公布号 JP2003022212(A) 申请公布日期 2003.01.24
申请号 JP20010204910 申请日期 2001.07.05
申请人 ALPS ELECTRIC CO LTD 发明人 FUJII MICHIYA
分类号 G06F12/00;G06F1/12;G06F5/06;G11C7/10;(IPC1-7):G06F12/00 主分类号 G06F12/00
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