| 摘要 |
PURPOSE: To provide a semiconductor memory having an error correction func tion in refresh operation. CONSTITUTION: This device includes a plurality of data pins (m pieces) inputting/ outputting continuously and respectively a plurality of pieces of data (n pieces), a converting circuit converting data of a data pin between parallel data and serial data, data bus lines of mxn lines in which data of (n) pieces are developed in parallel for data pins of (m) pieces, address selection lines of (m) pieces connecting data bus lines to a memory block at the time of activation so that data pins of (m) pieces corresponds to memory blocks of (m) pieces and data of (n) pieces are inputted/outputted for one memory block, and a parity data comparison circuit performing parity check for data of (m) pieces read out from a memory block of (m) pieces and a parity bit read out from a memory block for parity corresponding to data pins of (m) pieces for every data of (n) pieces.
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