INTEGRATED CIRCUITS PROTECTED AGAINST REVERSE ENGINEERING AND METHOD FOR FABRICATING THE SAME USING ETCHED PASSIVATION OPENINGS IN PASSIVATION LAYER
摘要
Semiconducting devices, including integrated circuits, are protected from reverse engineering by passivation openings made in a passivation layer. When a reverse engineeretches away the passivation layer and typically the first metal layer, underlying metallayers and/or other elements of the device are destroyed making the reverse engineeringall the more difficult. A method for fabricating such devices is also disclosed.
申请公布号
WO02059964(A3)
申请公布日期
2003.01.23
申请号
WO2002US02261
申请日期
2002.01.24
申请人
HRL LABORATORIES, LLC;CHOW, LAP-WAI;BAUKUS, JAMES, P.;CLARK, WILLIAM, M., JR.
发明人
CHOW, LAP-WAI;BAUKUS, JAMES, P.;CLARK, WILLIAM, M., JR.