发明名称 |
Source/drain extension fabrication process |
摘要 |
An improved source/drain extension process is provided by processing steps (steps A and G) that cover the wafer and dry etching steps (steps D and I) that provide side wall spacers of poly oxide and/or cap oxide from the PMOS gate areas before doing PMOS implanting steps(K and M). The capping of the wafer (step G)with the cap oxide after the NMOS implant also prevents the arsenic from out diffusing from the silicon. Further embodiments include implanting directly on the base
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申请公布号 |
US2003017674(A1) |
申请公布日期 |
2003.01.23 |
申请号 |
US20020197989 |
申请日期 |
2002.07.18 |
申请人 |
MILES DONALD S.;GRIDER DOUGLAS T.;CHIDAMBARAM CHIDI PR;JAIN AMITABH |
发明人 |
MILES DONALD S.;GRIDER DOUGLAS T.;CHIDAMBARAM CHIDI PR;JAIN AMITABH |
分类号 |
H01L21/265;H01L21/336;H01L21/8238;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/265 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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