发明名称 |
Semiconductor inspecting system for inspecting a semiconductor integrated circuit device, and semiconductor inspecting method using the same |
摘要 |
An apparatus to be inspected is mounted on one surface of a socket board. An auxiliary inspecting apparatus for adjusting timing of write signals transmitted from a semiconductor inspecting apparatus is mounted on the other surface of the socket board. Input/output (I/O) pins of the auxiliary inspecting apparatus are connected to corresponding I/O pins of the inspected device via through holes in the socket board on a one-to-one basis. This semiconductor inspecting method is thus capable of easily suppressing the delay difference between a plurality of signals output from the semiconductor inspecting apparatus.
|
申请公布号 |
US2003016045(A1) |
申请公布日期 |
2003.01.23 |
申请号 |
US20020119067 |
申请日期 |
2002.04.10 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
TANIMURA MASAAKI;HAMADA MITSUHIRO;HASHIMOTO OSAMU |
分类号 |
G01R31/28;(IPC1-7):G01R31/26 |
主分类号 |
G01R31/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|