| 摘要 |
A method and apparatus includes processing for combining a plurality of virtual circuits into a combined virtual circuit, where such processing begins by buffering cells of each virtual circuit into a corresponding buffer. The processing then continues by obtaining priority information for each virtual circuit and obtaining logical buffer de-queuing information. The priority information, for example, may equate to priorities established via the varying levels of ATM services. The logical buffer de-queuing information corresponds to an access sequence for a plurality of logical ring buffers that are comprised of the buffers, or buffer identifiers. The processing then continues by generating the combined virtual circuit based on the logical buffer de-queuing information and the priority information.
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