| 摘要 |
In a trench-gate field-effect transistor of inverted configuration, the drain region (14) is adjacent to the surface with the insulated trench-gate structure (11,12). The gate dielectric 12 is thicker adjacent to the drain region (14), and preferably also the drain drift region (14a), than it is adjacent to the channel-accommodating portion (15a) of the transistor body region (15). Another portion (15b) of the transistor body region (15) is electrically shorted to the underlying source region (13) by a buried electrical short (35). This buried short is provided by a leaky p-n junction (35) between a highly doped (p+) bottom portion (15b) of the body region and the underlying source region (13), at an area that is separated laterally from the insulated gate electrode (11) by an active portion (13a) of the source region adjacent to the gate trench (20). This portion (13a) of the source region can be formed by dopant implantation and/or diffusion via the lower portion of the trench (20). It extends across the highly doped bottom portion (15b) of the body region to connect with the channel-accommodating portion (15a) adjacent to the trench-gate structure (11,12). A compact layout of drain and trench-gate structures is achievable at the body surface (10a), and a compact layout of the buried electrical short (35) is achievable with the underlying source region (13).
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