| 摘要 |
In an integrated circuit (IC) for providing an enabling signal (EN) to a converter, the integrated circuit (IC) includes a monitoring circuit (FET1, R2, D1, Io, M, S1) for providing a control signal (CS) in response to a level of a line voltage (Vline) on a first connection terminal (8) of the integrated circuit (IC), and a start-up circuit (FET2, Istrt_up, Vcc_strt-Lev, COMP, S2) for providing the enabling signal (EN) to the converter in response to the control signal (CS) and a generated voltage level (Vcc), the generated voltage level (Vcc) being generated in response to the level of the line voltage (Vline) on the first connection terminal (8). The monitoring circuit and the start-up circuit sense the level of the line voltage (Vline) only via the first connection terminal (8).
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