发明名称 Windowing mechanism for reducing pessimism in cross-talk analysis of digital chips
摘要 This invention reduces pessimism in cross talk analysis of digital circuits by combining only the peak noises from aggressor nets that can switch simultaneously during the time interval when the downstream receiving latch can sample the errant data. This is done by, first, determining aggressor switching windows and victim sensitivity windows. These windows are then used to determine which combination of noise sources can temporally align so as to cause the greatest noise within the victim sensitivity window.
申请公布号 US6510540(B1) 申请公布日期 2003.01.21
申请号 US20000640540 申请日期 2000.08.17
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KRAUTER BYRON LEE;MEHROTRA SHARAD;SAXMAN JONATHAN HUMPHREY;VILLARRUBIA PAUL GERARD;WIDIGER DAVID J.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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