发明名称 Process for manufacturing electronic devices comprising nonvolatile memory cells of reduced dimensions
摘要 A process for the manufacturing of electronic devices, including memory cells, involving forming, on a substrate of semiconductor material, multilayer stacks including a floating gate region, an intermediate dielectric region, and a control gate region; forming a protective layer extending on top of the substrate and between the multilayer stacks and having a height at least equal to the multilayer stacks. The step of forming multilayer stacks includes the step of defining the control gate region on all sides so that each control gate region is completely separate from adjacent control gate regions. The protective layer isolates the multilayer stacks from each other at the sides. Word lines of metal extend above the protective layer and are in electrical contact with the gate regions.
申请公布号 US6509222(B1) 申请公布日期 2003.01.21
申请号 US20000718971 申请日期 2000.11.22
申请人 STMICROELECTRONICS S.R.L. 发明人 GROSSI ALESSANDRO;CLEMENTI CESARE
分类号 H01L21/8239;H01L21/8247;H01L27/115;(IPC1-7):H01L21/823 主分类号 H01L21/8239
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