发明名称 Multi-gigabit-per-sec clock recovery apparatus and method for optical communications
摘要 Methods and apparatus for generating clock signals accurately locked to multi-gigabits-per-second data signals received over fiber optic channels are disclosed. The invention includes a phase detector for comparing a data signal and a clock signal, a one shot unit for detecting a data transition, an XOR, a filter, a main charge pump, a compensating charge pump for producing additive or compensating current, and a VCO for generating the clock signal. The phase detector includes multiple D-flip flops. The one shot unit includes a delay unit and an AND gate. The filter includes a resistor, a capacitor and a negative resistance amplifier. The main charge pump includes differential inputs, double outputs, cross-quading resistors, differential NPN input transistors, and a current source. The compensating charge pump includes differential NPN input transistors and a current source. In operation, when there is a data transition and if the clock signal and data signal are out of phase synchronization, then the compensating charge pump will enhance the operation of the main charge pump, and the VCO will speed up or slow down the clock signal depending on whether the clock signal is advanced or retarded in phase compared to the data signal. When there is no data transition, the compensating charge pump will in effect counterbalance the operation of the main charge pump, and the frequency of the clock signal will be maintained at the same level it was at the onset of the no data transition period.
申请公布号 US6509801(B1) 申请公布日期 2003.01.21
申请号 US20010895955 申请日期 2001.06.29
申请人 SIERRA MONOLITHICS, INC. 发明人 LAO BINNEG Y.;ROWE DAVID A.;PULVER JAMES R.
分类号 H03L7/089;H03L7/14;H04L7/033;(IPC1-7):H03L7/00 主分类号 H03L7/089
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