| 摘要 |
The present invention designs and implements a high-speed PLL circuit and a high-speed synthesizer using the high-speed PLL circuit which has an increased switching speed, a reduced number of jitters and a reduced magnitude of spurious response. In order to achieve the above, the present invention provides a PLL circuit forming a closed loop wherein: one of the inputs of a phase comparator 1 serves as the input of the PLL circuit and the output of phase comparator 1 is connected to the input of a loop filter 2; the output of loop filter 2 is connected to the input of a voltage-controlled oscillator (VCO) 3; the output of the VCO 3 serves as the output of the PLL circuit; and the output of the VCO 3 is supplied to the other input of phase comparator 1 through a frequency divider 4. The circuit form and circuit constants of loop filter 2 are determined so that the transfer function of the closed loop becomes a Gaussian function. |
