发明名称 FRAME PULSE RETIMING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce the scale of a retiming circuit for transferring the clock of reference frame pulses to the clock inside the device. SOLUTION: An n-1 bit shift register 4 for performing a shift operation, based on a reference clock controls the shift of reference frame pulses fed from a network, an AND circuit 5 combines each bit output of the register 4 with the reference clock, to expand them to pulses F1 having an n-fold pulse width, a DFF 7 conducts re-timing the pulses F1 according to an internal clock C1, and a differential circuit composed of DFFs 8, 9, 11 and an AND circuit 10 converts the pulse F1 into a pulse, having a one-bit width of the internal clock and outputs it as an internal frame pulse. Thus, it is sufficient to use a shift register for a pulsewidth expander circuit, a D-FFs for re-timing and a pulsewidth converting differential circuit, rather than using a memory circuit and its peripheral circuits. Since circuits like these are each of a small scale, the scale of the circuit as a whole can be reduced.
申请公布号 JP2003018135(A) 申请公布日期 2003.01.17
申请号 JP20010204158 申请日期 2001.07.05
申请人 NEC ENG LTD 发明人 IIJIMA TAKASHI
分类号 H03L7/06;H04L7/00 主分类号 H03L7/06
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