| 摘要 |
PROBLEM TO BE SOLVED: To provide a ciphering circuit whose circuit scale is made small and which can realize high-speed processings at a certain level, in the case of mounting an AES(advanced encryption standard) block code. SOLUTION: A round processing part is provided with a first round key addition circuit for adding the value of a round key to input data, an intermediate register and shift row conversion circuit for temporarily storing an output of the first round key addition circuit and also executing shift row conversion, a byte sub conversion circuit, to which a value of the intermediate register and shift row conversion circuit is inputted and which performs byte sub conversion, a second round key addition circuit to which the value of the intermediate register and shift row conversion circuit is inputted and which adds the value of a round key, a mix column conversion circuit for performing mix column conversion of an output of the second round key addition circuit, and a second selector for outputting any output among outputs of a first selector, the intermediate register and shift row conversion circuit, the byte sub conversion circuit and the mix column conversion circuit to the second round key addition circuit.
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