| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a NAND type memory array in which a speed in the case of reading can be prevented from lowering by separating a well and a bit line, a reading method, a programming method and an erasing method using the same. SOLUTION: In the NAND type memory array to use a deep trench isolation(DTI) scheme, in order to prevent lowering in the speed upon a reading operation due to great well loading caused by linking the well and the line for impressing negative bias in the case of programming and impressing positive bias in the case of erasing as well bias, a well terminal for impressing the bias of the well in the case of erasing and reading, a triple well select gate for selecting the a terminal and a program well select gate for impressing bias through the bit line to the well in the case of programming are further configured, and thus the NAND type memory array is provided which prevents the lowering in the speed upon the reading operation by separating the well and the bit line, and the reading method, the programming method and the erasing method using the NAND type memory array are provided.</p> |
