ADDRESS CIRCUIT FOR SEMICONDUCTOR MEMORY, X DECODER, AND SEMICONDUCTOR MEMORY

摘要

PROBLEM TO BE SOLVED: To decrease the parasitic capacitance load of a boosting circuit in a low voltage application. SOLUTION: A word line driver for a flash memory uses a NMOS circuit for decreasing parasitic capacitance load. In a delay system for delaying turning-on of the source drain circuit of a driver for a short time after turning on of the gate of a driver transistor, auxiliary boosting is obtained by the gate capacitance of the driver transistor.