发明名称 |
NON-VOLATILE SEMICONDUCTOR MEMORY AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To reduce a cell area in a flash memory device of a single gate structure. SOLUTION: In an active area forming a floating gate electrode on an Si substrate forming a burying dispersion area being a control gate so as to be capacity-coupled through an insulating of the surface of the Si substrate and forming a flash memory cell, an n type dispersion area being a source area and a drain area is formed on both sides of the floating gate electrode.
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申请公布号 |
JP2003017597(A) |
申请公布日期 |
2003.01.17 |
申请号 |
JP20010201055 |
申请日期 |
2001.07.02 |
申请人 |
FUJITSU LTD |
发明人 |
HASHIMOTO KOJI;TAKAHASHI KOJI |
分类号 |
H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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