摘要 |
PROBLEM TO BE SOLVED: To stably and surely adjust a timing of a correlation double sampling pulse so as to cope with high-speed transfer of electric charges attended with increased number of pixels of an imaging means. SOLUTION: A CDS(Correlation Double Sampling) circuit 25 receives an analog output signal of a CCD 24. The CDS circuit 25 samples and holds a feed-through part of the output signal synchronously with a feed-through clamp pulse FP, samples and holds a pixel signal part of the output signal synchronously with a sample pulse SP, and subtracts the both to eliminate a reset noise and a low frequency noise. In adjusting the timing of the feed-through clamp pulse FP and the sample pulse SP, the CCD 24 outputs an adjustment signal under the instruction of a microcomputer 33. Further, the width of a reset pulse RP is adjusted by utilizing the adjustment signal.
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