| 摘要 |
A damascene process for introducing copper into metallization layers in microelectronic structures includes a step of forming an enhancement layer of a metal alloy, such as a copper alloy or Co-W-P, over the barrier layer, using PVD, CVD or electrochemical deposition prior to electrochemically depositing copper metallization. The enhancement layer has a thickness from 10mu to 100mu and conformally covers the discontinuities, seams and grain boundary defects in the barrier layer. The enhancement layer provides a conductive surface onto which a metal layer, such as copper metallization, may be applied with electrochemical deposition. Alternatively, a seed layer may be deposited over the enhancement layer prior to copper metallization.
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